STM32F103 "Hello World" Part2

Block Diagram

• STM32F103xx series 內部為Cortex-M3 32-bit RISC架構, 最快系統時脈72MHz, 
• Ibus (Instruction Bus)為ARM core從Internal Flash提取指令bus,  Flash放置code與自定義資料etc.
• Dbus (Data Bus)為ARM core存取Internal SRAM的bus, SRAM內存放register variable
• System bus為MCU周邊控制器存取通道 
• Bus Matrix為調度ARM core與周邊的管理
• AHB, APB為AMBA規範下的protocol, 常見於SoC, AMBA為通用協定, 提供core與peripherals間的bus

AMBA(Advanced Micro-controller Bus Architecture)
AHB(Advanced High performance Bus)
APB(Advanced Peripheral Bus)
STM32F103xx series AHB Fmax = 72MHz, APB2 Fmax = 72MHz, APB1 Fmax = 36MHz, 使用上需注意peripherals放置在哪一bus上, 影響到該peripherals Fmax

Clock Tree

SYSCLK source:

• HSI RC (8MHz)
• HSE
• PLL (MUL x2-16)

*when the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is 64MHz.

*for the USB function to be available, both HSE and PLL must be enable, with USBCLK running at 48MHz.

*to have an ADC conv. time of 1us, APB2 must be at 14MHz, 28MHz or 56MHz.

RTC source:

• LSI (40kHz)
• LSE
• HSE (/128)

External oscillator pin

Clock configuration of STM32CubeMX

Using LSE of 32.768kHz

Using HSE of 8MHz, through PLLMUX x9

CubeMX有防呆功能, 當設定錯的clock時, 會變紅底警告